Libs mengikut tag "Verilog"

PlatformIO

  • 6.9k
  • Python
  • Apache License 2.0

logisim-evolution

  • 3.5k
  • Java
  • GNU General Public License v3.0 only

openwifi

  • 3.2k
  • C
  • GNU Affero General Public License v3.0

chisel

  • 3.1k
  • Scala
  • Apache License 2.0

VexRiscv

NyuziProcessor

  • 1.7k
  • C
  • Apache License 2.0

verilator

  • 1.7k
  • C++
  • GNU Lesser General Public License v3.0 only

darkriscv

  • 1.7k
  • Verilog
  • BSD 3-clause "New" or "Revised"

icestudio

  • 1.5k
  • JavaScript
  • GNU General Public License v3.0 only

cocotb

  • 1.4k
  • Python
  • BSD 3-clause "New" or "Revised"

SpinalHDL

  • 1.3k
  • Scala
  • GNU General Public License v3.0

clash-ghc

  • 1.3k
  • Haskell
  • BSD 2-clause "Simplified"

neorv32

  • 1.2k
  • VHDL
  • BSD 3-clause "New" or "Revised"

hdl

  • 1.2k
  • Verilog
  • GNU General Public License v3.0

MetroBoy

serv

platformio-vscode-ide

fusesoc

  • 995
  • Python
  • BSD 2-clause "Simplified"

openlane

  • 945
  • Python
  • Apache License 2.0

OpenROAD

  • 910
  • Verilog
  • BSD 3-clause "New" or "Revised"

riscv

  • 813
  • Verilog
  • BSD 3-clause "New" or "Revised"

open-fpga-verilog-tutorial

  • 679
  • Verilog
  • GNU General Public License v3.0 only

scr1

apio

  • 650
  • Verilog
  • GNU General Public License v3.0 only

verilog2factorio

  • 648
  • TypeScript
  • GNU General Public License v3.0 only

biriscv

edalize

  • 529
  • Python
  • BSD 2-clause "Simplified"