Libs mengikut tag "Systemverilog"

clash-ghc

  • 1.3k
  • Haskell
  • BSD 2-clause "Simplified"

verible

  • 965
  • C++
  • Apache License 2.0

hdmi

axi

edalize

  • 529
  • Python
  • BSD 2-clause "Simplified"

slang

sv2v

  • 390
  • Haskell
  • BSD 3-clause "New" or "Revised"

vscode-terosHDL

  • 389
  • JavaScript
  • GNU General Public License v3.0 only

svls

sv-parser

  • 335
  • Rust
  • GNU General Public License v3.0

pymtl3

  • 295
  • Python
  • BSD 3-clause "New" or "Revised"

Surelog

  • 284
  • C++
  • Apache License 2.0

hdlConvertor

svlint

rggen

veryl

  • 188
  • Rust
  • GNU General Public License v3.0

hdl_checker

  • 172
  • Python
  • GNU General Public License v3.0 only

open-register-design-tool

FPGA-SDcard-Reader

veridian

BrianHG-DDR3-Controller

cheshire

fpu

  • 34
  • VHDL
  • Apache License 2.0

spi-to-axi-bridge

  • 21
  • VHDL
  • Apache License 2.0

fsm2sv

  • 15
  • Python
  • BSD 3-clause "New" or "Revised"

libsv

friscv

teroshdl-documenter-demo

rggen-sv-rtl

mips_cpu